Fig. 1

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a) Optical micrograph of the fabricated Si3N4 PIC, showing different functional regions: WG cutback structures (purple), bend and bend-shift loss structures (cyan), EBL–OL taper structures (yellow), grating coupler (green) and splitter test structures (orange). b) Targeted multilayer stack. From bottom to top: Si substrate, SiO2 BOX (L-1), Si3N4 WG-GC (L-2) and WG for light incoupling layers (L-4) separated by a 1.25 μm thick SiO2 buffer layer (L-3). Above these, an additional SiO2 buffer layer is followed by a gold ground plane, 3 μm thick SiO2 spacer, and a top gold layer used as the electrodes. Holes in the electrodes are covered with an ITO layer. The red cone illustrates the beam emitted by the GC.
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